Field of the Invention
The present invention relates to high density memory devices, and particularly the operation of devices using stacked memory structures.
Description of Related Art
As critical dimensions of devices in integrated circuits shrink toward perceived limits of manufacturing technologies, designers have been looking to techniques to achieve greater storage capacity, and to achieve lower costs per bit. Technologies being pursued include storing multiple bits per cell and stacking multiple planes of memory cells on a single chip.
Programming operations for multiple bit per cell technologies can consume significant amounts of time, compared to single bit per cell implementations, because of the requirement to establish multiple program levels. Also, such multiple bit per cell technologies can involve a greater number of program pulses during a program cycle, which can cause greater disturbance of the data held in cells not target of the program operation.
3D memory structures are very dense, but the density can also contribute to problems with disturbance of neighbor cells during programming.
Thus, it is desirable to provide for a technology for programming multiple bit per cell memories, in both 2D and 3D memories, with improved speed and performance.